# WAVE11（削顶锁存态观察段，2026-11-04 19:36:41 触发）与 WAVE10（无归属切换瞬态段）wave_read.py 输出

## WAVE11 dump
FILE            : WAVE11.BIN  (5250 bytes)
magic           : 57 52 01  ('WR' + version byte 1)
ver             : 1
fs_hz           : 1000
pts_per_cycle   : 20
ch_count        : 8
pts_per_ch      : 320  (320 ms at 1000 Hz)
pre_pts         : 160
trig_src        : 1 (MANUAL)
trig_elm        : 0
t0_ms           : 1655148 (ms since power-on)
wall            : 1793821000 (epoch s)
eng             : 0 (pin-domain)
flags_seq       : 0x00  VALID bits: (none)
clip_mask       : 0x00E6  [UB UC IB IC IN]
frame_seq       : 1654819
CRC16(hdr)      : 0xC99C  OK   covers [0,126), low byte first
CRC16(data)     : 0x5122  OK   covers 5120 bytes, low byte first
-- channel table (8 entries x 12 B) --
IDX SEM NAME  SRC        BITS AVAIL       K_Q16   B_CODES       LSB_uV       FLAG
  0   0 UA    TPAFE5160    16 0x00    10000000         0   152.587891          .
  1   1 UB    STM32-ADC1   12 0x02    52800000         0   805.664062    CLIPPED
  2   2 UC    STM32-ADC1   12 0x02    52800000         0   805.664062    CLIPPED
  3   3 UN    TPAFE5160    16 0x00    10000000         0   152.587891          .
  4   4 IA    TPAFE5160    16 0x00    10000000         0   152.587891          .
  5   5 IB    STM32-ADC1   12 0x02    52800000         0   805.664062    CLIPPED
  6   6 IC    STM32-ADC1   12 0x02    52800000         0   805.664062    CLIPPED
  7   7 IN    STM32-ADC1   12 0x02    52800000         0   805.664062    CLIPPED

## WAVE11 shape
unit: mV eng=0(pin-domain)   min-run for rail pin = 4 samples
 CH NAME  SRC        CYCLES  AMP[mVpk]  POL    SYM  PIN_LO  PIN_HI  RAIL
  0 UA    TPAFE5160   71.50       0.31    +  1.467       0       0     .
  1 UB    STM32-ADC1   0.00       0.00    0  1.000     320       0   YES
  2 UC    STM32-ADC1  48.00      10.88    +  1.406       0       0     .
  3 UN    TPAFE5160   57.50       0.38    -  1.497       0       0     .
  4 IA    TPAFE5160   63.00       0.31    +  1.369       0       0     .
  5 IB    STM32-ADC1  46.00       9.67    +  1.372       0       0     .
  6 IC    STM32-ADC1  52.00       6.85    +  1.415       0       0     .
  7 IN    STM32-ADC1  48.00       8.46    +  1.397       0       0     .
clip reconcile: measured=0x0002 [UB]  header=0x00E6 [UB UC IB IC IN]  MISMATCH
yardstick: equality (default card check) -- measured rail pins must equal the sealed clip_mask
note: header clip_mask is the seal-time CLIPPED STAMP, source-derived in V0.1 (App/algo/adc_cal.c: s_rom_k_stm32 -> CLIPPED, unipolar no-bias), NOT measured from samples; measured is this segment's rail pins. Real V0.1 AC waves bottom-rail the 5 stamped channels, so equality is expected on-board; a non-railed measurement means synthetic fixture (e.g. column ramps) or wiring change -- investigate, do not auto-blame the seal

## WAVE10 shape
unit: mV eng=0(pin-domain)   min-run for rail pin = 4 samples
 CH NAME  SRC        CYCLES  AMP[mVpk]  POL    SYM  PIN_LO  PIN_HI  RAIL
  0 UA    TPAFE5160    0.50    1408.39    +  1.978       0       0     .
  1 UB    STM32-ADC1  60.50      10.07    +  1.501       0       0     .
  2 UC    STM32-ADC1  52.50      10.47    +  1.510       0       0     .
  3 UN    TPAFE5160    0.50       6.03    -  2.029       0       0     .
  4 IA    TPAFE5160   55.00       0.31    +  1.491       0       0     .
  5 IB    STM32-ADC1  51.50       9.67    +  1.501       0       0     .
  6 IC    STM32-ADC1  59.50      10.07    +  1.501       0       0     .
  7 IN    STM32-ADC1  62.50      10.07    +  1.446       0       0     .
clip reconcile: measured=0x0000 [-]  header=0x00E6 [UB UC IB IC IN]  MISMATCH
yardstick: equality (default card check) -- measured rail pins must equal the sealed clip_mask
note: header clip_mask is the seal-time CLIPPED STAMP, source-derived in V0.1 (App/algo/adc_cal.c: s_rom_k_stm32 -> CLIPPED, unipolar no-bias), NOT measured from samples; measured is this segment's rail pins. Real V0.1 AC waves bottom-rail the 5 stamped channels, so equality is expected on-board; a non-railed measurement means synthetic fixture (e.g. column ramps) or wiring change -- investigate, do not auto-blame the seal

## WAVE10 fft ch0
unit: mV  eng=0 (pin-domain)  [pin-domain = ADC pin voltage, NOT calibrated secondary]
 CH NAME  SRC         CYCLE  RMS-f[mV] ANG-f[deg] RMS-2x[mV] RMS-5x[mV] NOTE
      (f = fundamental; 2x/5x = 2nd and 5th harmonic; angle reference = first sample of this window, not a phase lock to the signal generator)
  0 UA    TPAFE5160       0       5.84   -139.52       2.44       0.99
  0 UA    TPAFE5160       1      15.51     -3.23       7.70       3.32
  0 UA    TPAFE5160       2      34.58     +4.50      17.43       7.66
  0 UA    TPAFE5160       3      51.19     +6.65      25.83      11.18
  0 UA    TPAFE5160       4      65.00     +7.38      32.69      14.36
  0 UA    TPAFE5160       5      74.50     +7.99      37.69      16.46
  0 UA    TPAFE5160       6      79.59     +8.70      40.07      17.62
  0 UA    TPAFE5160       7      79.39     +9.29      40.10      17.47
  0 UA    TPAFE5160       8      74.51     +9.87      37.56      16.41
  0 UA    TPAFE5160       9      64.92    +10.63      32.72      14.33
  0 UA    TPAFE5160      10      50.99    +11.42      25.81      11.22
  0 UA    TPAFE5160      11      34.17    +13.62      16.93       7.45
  0 UA    TPAFE5160      12      14.93    +20.84       7.48       3.33
  0 UA    TPAFE5160      13       5.76   +157.00       2.59       1.09
  0 UA    TPAFE5160      14      25.10   -177.39      12.59       5.53
  0 UA    TPAFE5160      15      43.38   -174.63      22.02       9.64
  0 UA    TPAFE5160     ALL mean=     44.96 min=      5.76 max=     79.59  over 16 cycles
note: mV = (code + b_codes) * k_q16/65536/1000 (adc_cal_apply formula, unit labeled by header eng, never re-guessed); full-cycle window, coefficients = sin/cos(2*pi*k/N)*sqrt(2)/N as in App/algo/phasor.c; phase = atan2(im,re) deg
