实现独立看门狗：CubeMX 配置 IWDG + 任务心跳位图，恢复三处被覆盖定制
经 CubeMX 图形界面启用 IWDG（Prescaler=64 / Reload=1249，标称 2498ms /
最坏 1701ms），并落地心跳位图判定、各任务埋点、RCC_CSR 复位原因上报与
configASSERT 改造。重生成覆盖的既有定制已全部恢复。
P0（开机死循环）：HAL_IWDG_Init() 内部立即启动看门狗，而 CubeMX 把
MX_IWDG_Init() 插在 app_main_init() 之前——该段 NAND/RTC/ADC 初始化耗时
数秒无喂狗点，按 2.5s 超时必然复位。改 Src/iwdg.c 为只填参数不启动，
启动移交 task_wd_start()，由 defaultTask 在存储 bring-up 完成后调用。
恢复的三处定制（重生成覆盖）：
- Src/stm32f4xx_it.c：HardFault_Handler 崩溃现场采集被打回空 while(1)
- Inc/FreeRTOSConfig.h：栈溢出检测与堆失败钩子两个宏被整块删除
- Src/freertos.c：三处任务栈实测记录中文注释丢失（数值未丢）
新增：
- App/util/task_watchdog.{c,h}：心跳位图 + 抽样判定 + IWDG 延后启动
- time_sync.c 长等待切片：net_recv_to 单次可睡满 30s 预算，切成 200ms 片
- Src/main.c 复位原因锁存（读后即清 RMVF，防残留误判）
埋点：defaultTask（唯一喂狗者）/ netTask（含 PHY 等待循环）/ uiTask /
timeSyncTask。ftpTask 首期剔除掩码，待二期改 lftpd。
门禁：build 0 错误 0 警告；pre-commit 10 钩子全通过；Flash +2956B / RAM +40B。
This commit is contained in:
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/**
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******************************************************************************
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* @file stm32f4xx_hal_iwdg.c
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* @author MCD Application Team
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* @brief IWDG HAL module driver.
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* This file provides firmware functions to manage the following
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* functionalities of the Independent Watchdog (IWDG) peripheral:
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* + Initialization and Start functions
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* + IO operation functions
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*
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******************************************************************************
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* @attention
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*
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* Copyright (c) 2016 STMicroelectronics.
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* All rights reserved.
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*
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* This software is licensed under terms that can be found in the LICENSE file
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* in the root directory of this software component.
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* If no LICENSE file comes with this software, it is provided AS-IS.
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*
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******************************************************************************
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@verbatim
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==============================================================================
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##### IWDG Generic features #####
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==============================================================================
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[..]
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(+) The IWDG can be started by either software or hardware (configurable
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through option byte).
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(+) The IWDG is clocked by the Low-Speed Internal clock (LSI) and thus stays
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active even if the main clock fails.
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(+) Once the IWDG is started, the LSI is forced ON and both cannot be
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disabled. The counter starts counting down from the reset value (0xFFF).
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When it reaches the end of count value (0x000) a reset signal is
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generated (IWDG reset).
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(+) Whenever the key value 0x0000 AAAA is written in the IWDG_KR register,
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the IWDG_RLR value is reloaded into the counter and the watchdog reset
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is prevented.
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(+) The IWDG is implemented in the VDD voltage domain that is still functional
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in STOP and STANDBY mode (IWDG reset can wake up the CPU from STANDBY).
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IWDGRST flag in RCC_CSR register can be used to inform when an IWDG
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reset occurs.
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(+) Debug mode: When the microcontroller enters debug mode (core halted),
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the IWDG counter either continues to work normally or stops, depending
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on DBG_IWDG_STOP configuration bit in DBG module, accessible through
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__HAL_DBGMCU_FREEZE_IWDG() and __HAL_DBGMCU_UNFREEZE_IWDG() macros.
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[..] Min-max timeout value @32KHz (LSI): ~125us / ~32.7s
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The IWDG timeout may vary due to LSI clock frequency dispersion.
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STM32F4xx devices provide the capability to measure the LSI clock
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frequency (LSI clock is internally connected to TIM5 CH4 input capture).
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The measured value can be used to have an IWDG timeout with an
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acceptable accuracy.
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[..] Default timeout value (necessary for IWDG_SR status register update):
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Constant LSI_VALUE is defined based on the nominal LSI clock frequency.
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This frequency being subject to variations as mentioned above, the
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default timeout value (defined through constant HAL_IWDG_DEFAULT_TIMEOUT
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below) may become too short or too long.
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In such cases, this default timeout value can be tuned by redefining
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the constant LSI_VALUE at user-application level (based, for instance,
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on the measured LSI clock frequency as explained above).
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##### How to use this driver #####
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==============================================================================
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[..]
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(#) Use IWDG using HAL_IWDG_Init() function to :
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(++) Enable instance by writing Start keyword in IWDG_KEY register. LSI
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clock is forced ON and IWDG counter starts counting down.
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(++) Enable write access to configuration registers:
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IWDG_PR and IWDG_RLR.
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(++) Configure the IWDG prescaler and counter reload value. This reload
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value will be loaded in the IWDG counter each time the watchdog is
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reloaded, then the IWDG will start counting down from this value.
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(++) Wait for status flags to be reset.
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(#) Then the application program must refresh the IWDG counter at regular
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intervals during normal operation to prevent an MCU reset, using
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HAL_IWDG_Refresh() function.
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*** IWDG HAL driver macros list ***
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====================================
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[..]
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Below the list of most used macros in IWDG HAL driver:
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(+) __HAL_IWDG_START: Enable the IWDG peripheral
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(+) __HAL_IWDG_RELOAD_COUNTER: Reloads IWDG counter with value defined in
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the reload register
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@endverbatim
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*/
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/* Includes ------------------------------------------------------------------*/
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#include "stm32f4xx_hal.h"
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/** @addtogroup STM32F4xx_HAL_Driver
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* @{
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*/
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#ifdef HAL_IWDG_MODULE_ENABLED
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/** @addtogroup IWDG
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* @brief IWDG HAL module driver.
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* @{
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*/
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/* Private typedef -----------------------------------------------------------*/
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/* Private define ------------------------------------------------------------*/
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/** @defgroup IWDG_Private_Defines IWDG Private Defines
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* @{
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*/
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/* Status register needs up to 5 LSI clock periods divided by the clock
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prescaler to be updated. The number of LSI clock periods is upper-rounded to
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6 for the timeout value calculation.
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The timeout value is calculated using the highest prescaler (256) and
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the LSI_VALUE constant. The value of this constant can be changed by the user
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to take into account possible LSI clock period variations.
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The timeout value is multiplied by 1000 to be converted in milliseconds.
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LSI startup time is also considered here by adding LSI_STARTUP_TIME
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converted in milliseconds. */
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#define HAL_IWDG_DEFAULT_TIMEOUT (((6UL * 256UL * 1000UL) / (LSI_VALUE / 128U)) + \
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((LSI_STARTUP_TIME / 1000UL) + 1UL))
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#define IWDG_KERNEL_UPDATE_FLAGS (IWDG_SR_RVU | IWDG_SR_PVU)
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/**
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* @}
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*/
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/* Private macro -------------------------------------------------------------*/
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/* Private variables ---------------------------------------------------------*/
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/* Private function prototypes -----------------------------------------------*/
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/* Exported functions --------------------------------------------------------*/
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/** @addtogroup IWDG_Exported_Functions
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* @{
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*/
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/** @addtogroup IWDG_Exported_Functions_Group1
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* @brief Initialization and Start functions.
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*
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@verbatim
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===============================================================================
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##### Initialization and Start functions #####
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===============================================================================
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[..] This section provides functions allowing to:
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(+) Initialize the IWDG according to the specified parameters in the
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IWDG_InitTypeDef of associated handle.
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(+) Once initialization is performed in HAL_IWDG_Init function, Watchdog
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is reloaded in order to exit function with correct time base.
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@endverbatim
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* @{
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*/
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/**
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* @brief Initialize the IWDG according to the specified parameters in the
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* IWDG_InitTypeDef and start watchdog. Before exiting function,
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* watchdog is refreshed in order to have correct time base.
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* @param hiwdg pointer to a IWDG_HandleTypeDef structure that contains
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* the configuration information for the specified IWDG module.
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* @retval HAL status
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*/
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HAL_StatusTypeDef HAL_IWDG_Init(IWDG_HandleTypeDef *hiwdg)
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{
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uint32_t tickstart;
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/* Check the IWDG handle allocation */
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if (hiwdg == NULL)
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{
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return HAL_ERROR;
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}
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/* Check the parameters */
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assert_param(IS_IWDG_ALL_INSTANCE(hiwdg->Instance));
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assert_param(IS_IWDG_PRESCALER(hiwdg->Init.Prescaler));
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assert_param(IS_IWDG_RELOAD(hiwdg->Init.Reload));
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/* Enable IWDG. LSI is turned on automatically */
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__HAL_IWDG_START(hiwdg);
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/* Enable write access to IWDG_PR and IWDG_RLR registers by writing
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0x5555 in KR */
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IWDG_ENABLE_WRITE_ACCESS(hiwdg);
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/* Write to IWDG registers the Prescaler & Reload values to work with */
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hiwdg->Instance->PR = hiwdg->Init.Prescaler;
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hiwdg->Instance->RLR = hiwdg->Init.Reload;
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/* Check pending flag, if previous update not done, return timeout */
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tickstart = HAL_GetTick();
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/* Wait for register to be updated */
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while ((hiwdg->Instance->SR & IWDG_KERNEL_UPDATE_FLAGS) != 0x00u)
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{
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if ((HAL_GetTick() - tickstart) > HAL_IWDG_DEFAULT_TIMEOUT)
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{
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if ((hiwdg->Instance->SR & IWDG_KERNEL_UPDATE_FLAGS) != 0x00u)
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{
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return HAL_TIMEOUT;
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}
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}
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}
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/* Reload IWDG counter with value defined in the reload register */
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__HAL_IWDG_RELOAD_COUNTER(hiwdg);
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/* Return function status */
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return HAL_OK;
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}
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/**
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* @}
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*/
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/** @addtogroup IWDG_Exported_Functions_Group2
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* @brief IO operation functions
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*
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@verbatim
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===============================================================================
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##### IO operation functions #####
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===============================================================================
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[..] This section provides functions allowing to:
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(+) Refresh the IWDG.
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@endverbatim
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* @{
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*/
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/**
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* @brief Refresh the IWDG.
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* @param hiwdg pointer to a IWDG_HandleTypeDef structure that contains
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* the configuration information for the specified IWDG module.
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* @retval HAL status
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*/
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HAL_StatusTypeDef HAL_IWDG_Refresh(IWDG_HandleTypeDef *hiwdg)
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{
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/* Reload IWDG counter with value defined in the reload register */
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__HAL_IWDG_RELOAD_COUNTER(hiwdg);
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/* Return function status */
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return HAL_OK;
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}
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/**
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* @}
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*/
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/**
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* @}
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*/
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#endif /* HAL_IWDG_MODULE_ENABLED */
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/**
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* @}
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*/
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/**
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* @}
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*/
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