458 lines
11 KiB
C
458 lines
11 KiB
C
/* USER CODE BEGIN Header */
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/**
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******************************************************************************
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* @file stm32f4xx_it.c
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* @brief Interrupt Service Routines.
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******************************************************************************
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* @attention
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*
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* Copyright (c) 2026 STMicroelectronics.
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* All rights reserved.
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*
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* This software is licensed under terms that can be found in the LICENSE file
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* in the root directory of this software component.
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* If no LICENSE file comes with this software, it is provided AS-IS.
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*
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******************************************************************************
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*/
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/* USER CODE END Header */
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/* Includes ------------------------------------------------------------------*/
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#include "main.h"
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#include "stm32f4xx_it.h"
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/* Private includes ----------------------------------------------------------*/
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/* USER CODE BEGIN Includes */
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#include "usart.h"
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/* USER CODE END Includes */
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/* Private typedef -----------------------------------------------------------*/
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/* USER CODE BEGIN TD */
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/* USER CODE END TD */
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/* Private define ------------------------------------------------------------*/
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/* USER CODE BEGIN PD */
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/* USER CODE END PD */
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/* Private macro -------------------------------------------------------------*/
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/* USER CODE BEGIN PM */
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/* USER CODE END PM */
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/* Private variables ---------------------------------------------------------*/
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/* USER CODE BEGIN PV */
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/* USER CODE END PV */
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/* Private function prototypes -----------------------------------------------*/
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/* USER CODE BEGIN PFP */
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/* USER CODE END PFP */
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/* Private user code ---------------------------------------------------------*/
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/* USER CODE BEGIN 0 */
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/* USER CODE END 0 */
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/* External variables --------------------------------------------------------*/
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extern DMA_HandleTypeDef hdma_spi1_rx;
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extern DMA_HandleTypeDef hdma_spi1_tx;
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extern DMA_HandleTypeDef hdma_spi2_rx;
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extern DMA_HandleTypeDef hdma_spi2_tx;
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extern SPI_HandleTypeDef hspi1;
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extern SPI_HandleTypeDef hspi2;
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extern DMA_HandleTypeDef hdma_usart1_tx;
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extern DMA_HandleTypeDef hdma_usart1_rx;
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extern UART_HandleTypeDef huart4;
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extern UART_HandleTypeDef huart5;
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extern UART_HandleTypeDef huart1;
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extern UART_HandleTypeDef huart2;
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extern UART_HandleTypeDef huart3;
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extern TIM_HandleTypeDef htim7;
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/* USER CODE BEGIN EV */
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/* USER CODE END EV */
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/******************************************************************************/
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/* Cortex-M4 Processor Interruption and Exception Handlers */
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/******************************************************************************/
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/**
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* @brief This function handles Non maskable interrupt.
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*/
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void NMI_Handler(void)
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{
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/* USER CODE BEGIN NonMaskableInt_IRQn 0 */
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/* USER CODE END NonMaskableInt_IRQn 0 */
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/* USER CODE BEGIN NonMaskableInt_IRQn 1 */
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while (1)
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{
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}
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/* USER CODE END NonMaskableInt_IRQn 1 */
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}
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/**
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* @brief This function handles Hard fault interrupt.
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*/
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/* USER CODE BEGIN HardFault_Handler */
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/* 崩溃现场采集（本函数为手工改写，CubeMX 重生成会覆盖！）：
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* EXC_RETURN bit2 判断异常帧在 MSP 还是 PSP，取帧指针交给 C 报告函数。
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* 空 while(1) 版会让死机在日志上完全静默（2026-09-20 存储套件死机排查实证） */
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__asm void HardFault_Handler(void)
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{
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extern hard_fault_report
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TST lr, #4
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ITE EQ
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MRSEQ r0, MSP
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MRSNE r0, PSP
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B hard_fault_report
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}
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/* USER CODE END HardFault_Handler */
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/* USER CODE BEGIN HardFault_Report */
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/*
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* 函数功能：HardFault 现场报告（裸机上下文，不经内核/printf）
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* 入口参数：frame - 异常栈帧 {R0,R1,R2,R3,R12,LR,PC,xPSR}
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* 函数说明：直接 HAL_UART_Transmit 轮询输出 PC/LR/xPSR 与 CFSR/HFSR 故障
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* 寄存器，供开机日志定位崩溃点（对照 .map 找符号）；输出后复位。
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*/
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static void hard_fault_puts(const char *s)
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{
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uint16_t len = 0;
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while (s[len] != '\0') {
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len++;
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}
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HAL_UART_Transmit(&huart1, (const uint8_t *)s, len, 0xFFFFu);
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}
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static void hard_fault_puthex(uint32_t v)
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{
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static const char digits[] = "0123456789ABCDEF";
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char out[9];
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int i;
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for (i = 0; i < 8; i++) {
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out[i] = digits[(v >> (28 - i * 4)) & 0xFu];
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}
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out[8] = '\0';
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hard_fault_puts(out);
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}
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void hard_fault_report(uint32_t *frame)
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{
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hard_fault_puts("\r\n[ERR] HARDFAULT PC=");
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hard_fault_puthex(frame[6]);
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hard_fault_puts(" LR=");
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hard_fault_puthex(frame[5]);
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hard_fault_puts(" xPSR=");
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hard_fault_puthex(frame[7]);
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hard_fault_puts(" R0=");
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hard_fault_puthex(frame[0]);
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hard_fault_puts(" R1=");
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hard_fault_puthex(frame[1]);
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hard_fault_puts(" R2=");
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hard_fault_puthex(frame[2]);
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hard_fault_puts(" R3=");
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hard_fault_puthex(frame[3]);
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hard_fault_puts(" CFSR=");
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hard_fault_puthex(SCB->CFSR);
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hard_fault_puts(" HFSR=");
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hard_fault_puthex(SCB->HFSR);
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/* BFAR/MMFAR 仅在对应 valid 位为 1 时有意义 */
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if ((SCB->CFSR & (1UL << 15)) != 0U) {
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hard_fault_puts(" BFAR=");
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hard_fault_puthex(SCB->BFAR);
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}
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if ((SCB->CFSR & (1UL << 7)) != 0U) {
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hard_fault_puts(" MMFAR=");
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hard_fault_puthex(SCB->MMFAR);
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}
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HAL_Delay(200);
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NVIC_SystemReset();
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}
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/* USER CODE END HardFault_Report */
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/**
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* @brief This function handles Memory management fault.
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*/
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void MemManage_Handler(void)
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{
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/* USER CODE BEGIN MemoryManagement_IRQn 0 */
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/* USER CODE END MemoryManagement_IRQn 0 */
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while (1)
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{
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/* USER CODE BEGIN W1_MemoryManagement_IRQn 0 */
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/* USER CODE END W1_MemoryManagement_IRQn 0 */
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}
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}
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/**
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* @brief This function handles Pre-fetch fault, memory access fault.
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*/
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void BusFault_Handler(void)
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{
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/* USER CODE BEGIN BusFault_IRQn 0 */
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/* USER CODE END BusFault_IRQn 0 */
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while (1)
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{
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/* USER CODE BEGIN W1_BusFault_IRQn 0 */
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/* USER CODE END W1_BusFault_IRQn 0 */
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}
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}
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/**
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* @brief This function handles Undefined instruction or illegal state.
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*/
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void UsageFault_Handler(void)
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{
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/* USER CODE BEGIN UsageFault_IRQn 0 */
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/* USER CODE END UsageFault_IRQn 0 */
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while (1)
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{
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/* USER CODE BEGIN W1_UsageFault_IRQn 0 */
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/* USER CODE END W1_UsageFault_IRQn 0 */
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}
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}
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/**
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* @brief This function handles Debug monitor.
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*/
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void DebugMon_Handler(void)
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{
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/* USER CODE BEGIN DebugMonitor_IRQn 0 */
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/* USER CODE END DebugMonitor_IRQn 0 */
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/* USER CODE BEGIN DebugMonitor_IRQn 1 */
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/* USER CODE END DebugMonitor_IRQn 1 */
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}
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/******************************************************************************/
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/* STM32F4xx Peripheral Interrupt Handlers */
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/* Add here the Interrupt Handlers for the used peripherals. */
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/* For the available peripheral interrupt handler names, */
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/* please refer to the startup file (startup_stm32f4xx.s). */
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/******************************************************************************/
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/**
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* @brief This function handles DMA1 stream3 global interrupt.
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*/
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void DMA1_Stream3_IRQHandler(void)
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{
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/* USER CODE BEGIN DMA1_Stream3_IRQn 0 */
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/* USER CODE END DMA1_Stream3_IRQn 0 */
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HAL_DMA_IRQHandler(&hdma_spi2_rx);
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/* USER CODE BEGIN DMA1_Stream3_IRQn 1 */
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/* USER CODE END DMA1_Stream3_IRQn 1 */
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}
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/**
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* @brief This function handles DMA1 stream4 global interrupt.
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*/
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void DMA1_Stream4_IRQHandler(void)
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{
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/* USER CODE BEGIN DMA1_Stream4_IRQn 0 */
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/* USER CODE END DMA1_Stream4_IRQn 0 */
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HAL_DMA_IRQHandler(&hdma_spi2_tx);
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/* USER CODE BEGIN DMA1_Stream4_IRQn 1 */
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/* USER CODE END DMA1_Stream4_IRQn 1 */
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}
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/**
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* @brief This function handles EXTI line[9:5] interrupts.
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*/
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void EXTI9_5_IRQHandler(void)
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{
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/* USER CODE BEGIN EXTI9_5_IRQn 0 */
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/* USER CODE END EXTI9_5_IRQn 0 */
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HAL_GPIO_EXTI_IRQHandler(TP_BUSY_Pin);
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/* USER CODE BEGIN EXTI9_5_IRQn 1 */
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/* USER CODE END EXTI9_5_IRQn 1 */
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}
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/**
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* @brief This function handles SPI1 global interrupt.
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*/
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void SPI1_IRQHandler(void)
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{
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/* USER CODE BEGIN SPI1_IRQn 0 */
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/* USER CODE END SPI1_IRQn 0 */
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HAL_SPI_IRQHandler(&hspi1);
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/* USER CODE BEGIN SPI1_IRQn 1 */
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/* USER CODE END SPI1_IRQn 1 */
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}
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/**
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* @brief This function handles SPI2 global interrupt.
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*/
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void SPI2_IRQHandler(void)
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{
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/* USER CODE BEGIN SPI2_IRQn 0 */
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/* USER CODE END SPI2_IRQn 0 */
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HAL_SPI_IRQHandler(&hspi2);
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/* USER CODE BEGIN SPI2_IRQn 1 */
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/* USER CODE END SPI2_IRQn 1 */
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}
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/**
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* @brief This function handles USART1 global interrupt.
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*/
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void USART1_IRQHandler(void)
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{
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/* USER CODE BEGIN USART1_IRQn 0 */
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/* USER CODE END USART1_IRQn 0 */
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HAL_UART_IRQHandler(&huart1);
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/* USER CODE BEGIN USART1_IRQn 1 */
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/* USER CODE END USART1_IRQn 1 */
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}
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/**
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* @brief This function handles USART2 global interrupt.
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*/
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void USART2_IRQHandler(void)
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{
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/* USER CODE BEGIN USART2_IRQn 0 */
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/* USER CODE END USART2_IRQn 0 */
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HAL_UART_IRQHandler(&huart2);
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/* USER CODE BEGIN USART2_IRQn 1 */
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/* USER CODE END USART2_IRQn 1 */
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}
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/**
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* @brief This function handles USART3 global interrupt.
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*/
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void USART3_IRQHandler(void)
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{
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/* USER CODE BEGIN USART3_IRQn 0 */
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/* USER CODE END USART3_IRQn 0 */
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HAL_UART_IRQHandler(&huart3);
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/* USER CODE BEGIN USART3_IRQn 1 */
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/* USER CODE END USART3_IRQn 1 */
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}
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/**
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* @brief This function handles UART4 global interrupt.
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*/
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void UART4_IRQHandler(void)
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{
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/* USER CODE BEGIN UART4_IRQn 0 */
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/* USER CODE END UART4_IRQn 0 */
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HAL_UART_IRQHandler(&huart4);
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/* USER CODE BEGIN UART4_IRQn 1 */
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/* USER CODE END UART4_IRQn 1 */
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}
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/**
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* @brief This function handles UART5 global interrupt.
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*/
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void UART5_IRQHandler(void)
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{
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/* USER CODE BEGIN UART5_IRQn 0 */
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/* USER CODE END UART5_IRQn 0 */
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HAL_UART_IRQHandler(&huart5);
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/* USER CODE BEGIN UART5_IRQn 1 */
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/* USER CODE END UART5_IRQn 1 */
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}
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/**
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* @brief This function handles TIM7 global interrupt.
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*/
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void TIM7_IRQHandler(void)
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{
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/* USER CODE BEGIN TIM7_IRQn 0 */
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/* USER CODE END TIM7_IRQn 0 */
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HAL_TIM_IRQHandler(&htim7);
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/* USER CODE BEGIN TIM7_IRQn 1 */
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/* USER CODE END TIM7_IRQn 1 */
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}
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/**
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* @brief This function handles DMA2 stream0 global interrupt.
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*/
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void DMA2_Stream0_IRQHandler(void)
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{
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/* USER CODE BEGIN DMA2_Stream0_IRQn 0 */
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/* USER CODE END DMA2_Stream0_IRQn 0 */
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HAL_DMA_IRQHandler(&hdma_spi1_rx);
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/* USER CODE BEGIN DMA2_Stream0_IRQn 1 */
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/* USER CODE END DMA2_Stream0_IRQn 1 */
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}
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/**
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* @brief This function handles DMA2 stream2 global interrupt.
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*/
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void DMA2_Stream2_IRQHandler(void)
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{
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/* USER CODE BEGIN DMA2_Stream2_IRQn 0 */
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/* USER CODE END DMA2_Stream2_IRQn 0 */
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HAL_DMA_IRQHandler(&hdma_usart1_rx);
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/* USER CODE BEGIN DMA2_Stream2_IRQn 1 */
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/* USER CODE END DMA2_Stream2_IRQn 1 */
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}
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/**
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* @brief This function handles DMA2 stream3 global interrupt.
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*/
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void DMA2_Stream3_IRQHandler(void)
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{
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/* USER CODE BEGIN DMA2_Stream3_IRQn 0 */
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/* USER CODE END DMA2_Stream3_IRQn 0 */
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HAL_DMA_IRQHandler(&hdma_spi1_tx);
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/* USER CODE BEGIN DMA2_Stream3_IRQn 1 */
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/* USER CODE END DMA2_Stream3_IRQn 1 */
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}
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/**
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* @brief This function handles DMA2 stream7 global interrupt.
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*/
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void DMA2_Stream7_IRQHandler(void)
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{
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/* USER CODE BEGIN DMA2_Stream7_IRQn 0 */
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/* USER CODE END DMA2_Stream7_IRQn 0 */
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HAL_DMA_IRQHandler(&hdma_usart1_tx);
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/* USER CODE BEGIN DMA2_Stream7_IRQn 1 */
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/* USER CODE END DMA2_Stream7_IRQn 1 */
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}
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/* USER CODE BEGIN 1 */
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/* USER CODE END 1 */
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